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https://stackoverflow.com/questions/39390218/how-to-use-thumb-2-instructions-with-gcc
I have written the following simplistic memcpy32 function, as a means of understanding how to write assembly code for the cortex-m4. .section .text .align 2 .global as_memcpy32 .type
http://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
Using the GNU Compiler Collection (GCC): ARM Options. ... Generate code that supports calling between the ARM and Thumb instruction sets. Without this option, on pre-v5 architectures, the two instruction sets cannot be reliably used inside one program. ... Additionally, the following architectures, which lack support for the Thumb execution ...
https://stackoverflow.com/questions/39555845/compile-time-register-checks-for-thumb-2-code
The R0-R7 restriction only applies to 16-bit Thumb, not 32-bit Thumb-2 (see here). The 32-bit STR.W has 4 bits for the register (encodings here). In fact, GCC is indeed generating a STR.W instruction (4DF804CC). The illegal instruction is likely caused by your target not supporting Thumb-2.
https://www.cnx-software.com/2011/04/22/compile-with-arm-thumb2-reduce-memory-footprint-and-improve-performance/
Apr 22, 2011 · ARM claims that Thumb-2 instructions (for ARM Cortex cores and all ARMv7 processors) provides performance improvements and code size optimization: Thumb-2 ... - No Comments on Compile with ARM Thumb2 to Reduce Memory Footprint and Improve Performance. Compile with ARM Thumb2 to Reduce Memory Footprint and Improve Performance. ARM claims that ...
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=47535
I have a GCC 4.6.0 (SVN trunk) compiler configured targeting arm-linux, configured with the --with-mode=thumb option to generate Thumb code by default. When I pass the compiler the -mno-thumb option, it ignores the option, and generates Thumb code anyway.
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