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https://www.kernel.org/doc/html/latest/driver-api/dmaengine/client.html
This returns a cookie can be used to check the progress of DMA engine activity via other DMA engine calls not covered in this document. dmaengine_submit() will not start the DMA operation, it merely adds it to the pending queue. For this, see step 5, dma_async_issue_pending.
https://www.kernel.org/doc/html/v4.19/driver-api/dmaengine/client.html
For cyclic DMA, a callback function may wish to terminate the DMA via dmaengine_terminate_async(). Therefore, it is important that DMA engine drivers drop any locks before calling the callback function which may cause a deadlock. Note that callbacks will always be invoked from the DMA engines tasklet, never from interrupt context.
https://wiki.analog.com/resources/tools-software/linux-drivers/axi-dmac
The AXI DMAC is a high-speed, high-throughput, general purpose DMA controller intended to be used to transfer data between system memory and other peripherals like high-speed converters.
https://forums.xilinx.com/xlnx/attachments/xlnx/ELINUX/13011/2/Linux-DMA-In-Device-Drivers.pdf
Linux DMA Engine Slave API – Page 1 The DMA Engine driver works as a layer on top of the Xilinx DMA drivers using the slave DMA API –It appears that slave may refer to the fact that the software initiates the DMA transactions to the DMA controller hardware rather than a hardware device with integrated DMA initiating a transaction
https://lwn.net/Articles/535153/
Changes since v5: - Dropped mmc portion and moved it to a separate series - Incorporate corrected version of dma_request_slave_channel_compat() - Fix #defines and enablement of TI_PRIV_EDMA option Changes since v4: - Fixed debug section mismatch in private edma api [01/14] - Respun format-patch to catch the platform_data/edma.h rename [01/14] - Removed address/size-cells from the …
https://events.static.linuxfound.org/sites/events/files/slides/ripard-dmaengine.pdf
APIs I DMAEngine I Merged in 2006, in 2.6.18 I Subsystem to handle memory-to-device transfers I Async TX I Merged in 2007, in 2.6.23 I Initially part of the raid5 code to support the XScale o oad engines I Subsystem to handle memory to memory operations (memcpy, XOR, etc.) I Implemented on top of dmaengine, but takes many shortcuts, instead of being a real client. ...
https://lwn.net/Articles/520351/
Changes since v2: - Rebased on 3.7-rc1 - Fixed bug in DT/pdata parsing first found by Gururaja that turned out to be masked by some toolchains - Dropped unused mach-omap2/devices.c hsmmc patch - Added AM33XX crossbar DMA event mux support - Added am335x-evm support Changes since v1: - Rebased on top of mainline from 12250d8 - Dropped the feature removal schedule patch - …
http://linux-kernel.2935.n7.nabble.com/PATCH-v7-00-10-DMA-Engine-support-for-AM33XX-td593561i60.html
Because soo many people like to type '0' instead in their DMA engine clients, it means that this flag is utterly useless today - you have to ignore it. So there's _no_ way for client drivers to actually tell the a DMA engine driver which _doesn't_ need to signal interrupts at the end of every transfer not to do so.
http://lkml.iu.edu/hypermail/linux/kernel/0903.2/03273.html
There are four slightly different dma engines on the s6000 family. One for memory-memory transfers, the other three for memory-device. This patch implements a platform-specific kernel-API to control these
http://lkml.iu.edu/hypermail/linux/kernel/1009.3/01915.html
This extends the PL011 UART driver with generic DMA engine support using the PrimeCell DMA engine interface. Tested-by: Jerzy Kasenberg <jerzy.kasenberg@xxxxxxxxx>
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